This page is the entry point for analog design on wafer.space. It covers the analog flow and sends detailed I/O, verification, process-option, and packaging work to their owning pages.
Current summary
The archive shows two useful starting points. The IEEE SSCS Chipathon 2025 repository contains GF180MCU analog designs and integration material. The wafer.space project template also contains a standalone analog pad-ring path. Confirmed facts, dated 2025-08-21 and 2026-08-10. (archive message; Discord) (archive message; Discord)
For a quarter slot, the latest captured answer says that its 48 I/O pads may be changed to analog pads. Confirmed guidance captured 2026-08-13. This is signed-in search evidence; its canonical Discord URL was not captured. (archive message)
Process options such as gf180mcuD, MIM-B, resistor choices, and native-Vt availability belong on Process Options and Open Questions. Electrical pad behavior belongs on Analog I/O and ESD. Signoff and extraction details belong on Analog Layout, Verification, and PEX.
Dated guidance
- 2025-10-09 — Open question. Tim Edwards described the native-device layers, but said he had assumed commercial availability and had not used those devices in a design. Do not present native-Vt NMOS availability as settled. (archive message; Discord)
- 2026-08-13 — Decision boundary. Leo Moser said manufacturing is flexible when the layout is DRC-clean. CoB use still requires the bond pads at the coordinates expected by the bonder and precheck. This is captured search evidence; its canonical Discord URL was not captured. (archive message)
Proposals and open work
- Proposal, 2026-08-01. Reusing an op-amp as a comparator began as a design question. It is not general wafer.space guidance. (archive message; Discord)
- Proposal, 2026-08-04. A participant planned an all-analog hand-routed die. The later pad-ring answer gives a route, not fabricated proof for that design. (archive message; Discord)
Related pages
- Analog I/O and ESD
- Analog Layout, Verification, and PEX
- Process and PDK
- Packaging and Chip on Board
- Projects and Designs
Sources
1408150314347139184— 2025-08-21T18:06:37.108Z — Tim Edwards — archive message; Discord — Chipathon analog resource.1425862668304253030— 2025-10-09T15:09:11.371Z — Tim Edwards — archive message; Discord — Native-device uncertainty.1533185310131749044— 2026-08-01T18:51:03.141Z — Tholin — archive message; Discord — Comparator proposal.1534307980059869225— 2026-08-04T21:12:08.510Z — Tholin — archive message; Discord — All-analog project plan.1536307136286433330— 2026-08-10T09:36:04.497Z — Leo Moser (mole99) — archive message; Discord — Standalone analog pad ring.1537441624102141982— 2026-08-13T12:44:07.470Z — Leo Moser (mole99) — archive message — DRC and CoB coordinate boundary; canonical Discord URL not captured.1537464422279282738— 2026-08-13T14:14:42.979Z — Leo Moser (mole99) — archive message — Quarter-slot analog-pad guidance; canonical Discord URL not captured.