Category: ℹ️ - Information
Parent channel: #⁉️-questions
Thread ID: 1450371418922422332
Messages: 74
message-1450371418922422332
2025-12-16T06:18:12.869+00:00 — LuighiV (@luighiv)
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Content
Hi,
I was running some prechecks for a multiproject chip and it is failing at certain instance throwing this error:
```
Non-integer magnification (0.2) in transform. Rounding to 0.
```
Has anyone faced something similiar?, and have an idea how to solve it?
Thanks,
Luighi
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2025-12-16T16:03:23.809+00:00 — Tim 'mithro' Ansell (@mithro_)
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@Leo Moser (mole99) / @Tim Edwards - Any ideas on this error?
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2025-12-16T16:04:28.936+00:00 — Leo Moser (mole99) (@mole99)
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@LuighiV can you post a link to the layout?
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2025-12-16T16:11:16.068+00:00 — LuighiV (@luighiv)
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Content
Hi @Leo Moser (mole99) @Tim 'mithro' Ansell this is the link https://drive.google.com/file/d/1GgmRQ5E_GbQYZFp6ogSY1hEyT46GxshO/view?usp=sharing
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2025-12-16T16:14:09.524+00:00 — LuighiV (@luighiv)
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Content
In the meantime I was doing some tests, and I think I found the root cause of the issue (seemed to have some empty subhierarchies inside A3) I deleted those empty hierarchies and right now I'm running the pre-checks again to confirm if those were the responsible of raising the error
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2025-12-16T16:24:17.242+00:00 — Leo Moser (mole99) (@mole99)
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That's great! However I see some other issues:
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2025-12-16T16:24:19.221+00:00 — Leo Moser (mole99) (@mole99)
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2025-12-16T16:24:56.031+00:00 — Leo Moser (mole99) (@mole99)
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The SRAMs from the default template were not correctly deleted. Their PR_bndry layers still exist and their instances can be found in the cell tree.
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2025-12-16T16:25:42.024+00:00 — Leo Moser (mole99) (@mole99)
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Default - Edited: 2025-12-16T16:25:46.511+00:00
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The seal ring (guard ring) is missing around the outer padring.
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2025-12-16T16:35:31.199+00:00 — LuighiV (@luighiv)
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Oh... didn't noticed it, I guessed I have deleted it completely, going to update it, thanks for noticing 🙂 👍
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2025-12-16T16:36:28.153+00:00 — LuighiV (@luighiv)
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regarding the seal ring, do you have a Pcell or script I can use to add it?
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2025-12-16T16:36:57.419+00:00 — Leo Moser (mole99) (@mole99)
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Content
I'm adding a check to the precheck to ensure there are some shapes on GUARD_RING_MK: https://github.com/wafer-space/gf180mcu-precheck/pull/36
This way we should catch such issues earlier :)
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2025-12-16T16:37:41.769+00:00 — Leo Moser (mole99) (@mole99)
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This is the PCell: https://github.com/wafer-space/gf180mcu/tree/main/gf180mcuD/libs.tech/klayout/tech/pymacros/sealring_cells
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2025-12-16T16:38:18.256+00:00 — Leo Moser (mole99) (@mole99)
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- Archive source: https://discord.wafer.space/wafer-space/Information/questions/magic-error-non-integer-magnification/2025-12/2025-12.json
Content
Did you create the padring using `make librelane-padring`?
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2025-12-16T16:39:00.269+00:00 — Leo Moser (mole99) (@mole99)
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Content
This script adds the sealring to the padring: https://github.com/wafer-space/gf180mcu-project-template/blob/01d1540414fefce2d3c8fca2086c425688fe389a/scripts/padring.py#L59
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2025-12-16T16:40:34.412+00:00 — LuighiV (@luighiv)
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yes, I have created it using that instruction
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2025-12-16T16:42:00.29+00:00 — Leo Moser (mole99) (@mole99)
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Maybe you deleted it accidentally?
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2025-12-16T16:42:06.248+00:00 — Leo Moser (mole99) (@mole99)
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For me it works fine:
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2025-12-16T16:43:18.105+00:00 — LuighiV (@luighiv)
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yeah, that's probably the reason, let me generate it again here, thanks for the advice 🙂
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2025-12-16T16:43:38.609+00:00 — Leo Moser (mole99) (@mole99)
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Content
You're welcome!
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2025-12-17T02:19:12.669+00:00 — LuighiV (@luighiv)
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Hi @Leo Moser (mole99) thanks for your feeback, now the padframe has the sealring and I deleted completly the SRAM devices:
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2025-12-17T02:34:38.906+00:00 — LuighiV (@luighiv)
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Default - Edited: 2025-12-17T02:35:26.344+00:00
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Content
however now I'm facing an issue with DRC errors, because as I'm following the embedded approach, I use a previous padframe we were using for Chipathon, however, that padframe seems to have some issues with CUP DRC. Do you know how can I fix it?
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2025-12-17T02:40:09.404+00:00 — LuighiV (@luighiv)
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this is the report I got:
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2025-12-17T03:11:23.649+00:00 — Tim 'mithro' Ansell (@mithro_)
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Content
@LuighiV - I guess the chipathon padframe needs to be updated with the fixed cells that Leo updated for wafer.space shuttle.
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2025-12-17T03:11:41.622+00:00 — Tim 'mithro' Ansell (@mithro_)
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In theory you should just be able to drop in a replacement?
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2025-12-17T04:55:55.289+00:00 — LuighiV (@luighiv)
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Hi @Tim 'mithro' Ansell, thanks for the advice 🙂 . Yes, I think I can do that, I'm trying right now to update the library from Leo's repo in my environment so it could get the fixed cells. Hope it goes fine 🤞
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2025-12-17T08:21:14.233+00:00 — Leo Moser (mole99) (@mole99)
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@LuighiV Yes exactly, the bondpad cells have been updated. You need to replace the bondpads in the chipathon padframe with the bondpads in: https://github.com/wafer-space/gf180mcu/blob/main/gf180mcuD/libs.ref/gf180mcu_fd_io/gds/gf180mcu_fd_io.gds
Note: only the "Bondpad_5LM" cell has been changed.
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2025-12-17T11:56:12.1+00:00 — LuighiV (@luighiv)
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Hi @Leo Moser (mole99) thanks for the comment. I've tried to replace the main pads by the new ones in your repo, however, when I run again, it is violating other rules with metal spacing, and the corner pads, have you modified them as well?
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2025-12-17T12:42:31.525+00:00 — Leo Moser (mole99) (@mole99)
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No, I didn't modify any other cells.
Did you perhaps delete some of the I/O filler cells? The errors always seem to be at the boundary of I/O cells (well, except for the corner cells).
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2025-12-17T12:57:43.095+00:00 — LuighiV (@luighiv)
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Hi Leo, I don't think so, I mean, I haven't delete the fills, what I did was just replace the old pads by the new ones by using the **Replace** cell option in the **Cells** panel
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2025-12-17T12:58:21.844+00:00 — Leo Moser (mole99) (@mole99)
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That sounds like the correct approach. Could you share the current GDS so I can take a look?
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2025-12-17T12:59:07.93+00:00 — LuighiV (@luighiv)
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yes!, please, give me a moment
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2025-12-17T13:03:16.425+00:00 — LuighiV (@luighiv)
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this is the link: https://drive.google.com/file/d/1GgmRQ5E_GbQYZFp6ogSY1hEyT46GxshO/view?usp=drive_link
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2025-12-17T13:04:13.468+00:00 — LuighiV (@luighiv)
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and this was the report
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2025-12-17T13:15:01.015+00:00 — Tim 'mithro' Ansell (@mithro_)
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@LuighiV - It would be good to load your latest GDS into the platform even if it is currently failing the precheck.
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2025-12-17T13:19:21.013+00:00 — Leo Moser (mole99) (@mole99)
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Something happened when you swapped out the bondpad cells:
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2025-12-17T13:19:34.269+00:00 — Leo Moser (mole99) (@mole99)
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2025-12-17T13:19:47.217+00:00 — Leo Moser (mole99) (@mole99)
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This is the top right corner of the outer padring.
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2025-12-17T13:19:58.534+00:00 — Leo Moser (mole99) (@mole99)
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323371864074485771 - Nickname: Leo Moser (mole99)
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2025-12-17T13:20:26.832+00:00 — Leo Moser (mole99) (@mole99)
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And this is the top right corner of the inner padring (chipathon).
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2025-12-17T13:24:38.393+00:00 — Leo Moser (mole99) (@mole99)
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323371864074485771 - Nickname: Leo Moser (mole99)
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These manual edits are dangerous and error prone. How about we create a KLayout script to merge the GDS files and swap the bondpads? :)
Can you share the separate GDS of the empty template project, and the GDS of the chipathon?
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2025-12-17T13:29:19.152+00:00 — LuighiV (@luighiv)
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sure, I'm going to upload it, thanks
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2025-12-17T13:31:06.317+00:00 — LuighiV (@luighiv)
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that would be great 🙂 , let me restore the previous version of the chipathon then, and going to share both
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2025-12-17T15:08:22.156+00:00 — LuighiV (@luighiv)
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Hi @Tim 'mithro' Ansell I'm having issues to upload from Google Drive. I was using this link https://drive.google.com/file/d/1GgmRQ5E_GbQYZFp6ogSY1hEyT46GxshO/view but it says it has size 0. I've tried with github but it has more than 100Mb so doesn't allow me to upload there
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2025-12-17T15:16:00.933+00:00 — Leo Moser (mole99) (@mole99)
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@LuighiV Tim is currently asleep.
You need a direct link to your layout. However you can compress it, if you didn't already?
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2025-12-17T15:16:30.598+00:00 — LuighiV (@luighiv)
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that's a good point, let me try it here
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2025-12-17T15:26:10.257+00:00 — LuighiV (@luighiv)
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Hi @Leo Moser (mole99) regarding this point, these are the links for :
- Original Chipathon GDS: https://github.com/AutoMOS-project/AutoMOS-chipathon2025/blob/update-for-ws/designs/libs/A_track_core/chiptop_A_track/chiptop_A_track__exported.gds
- Empty WS Padframe: https://github.com/AutoMOS-project/AutoMOS-chipathon2025/blob/update-for-ws/designs/libs/A_track_core/padring_ws/padring_ws.gds
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2025-12-17T15:26:46.935+00:00 — LuighiV (@luighiv)
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It worked! thanks, now it is running the checks
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2025-12-17T15:44:35.194+00:00 — Leo Moser (mole99) (@mole99)
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It seems I got it working, but there is something very strange going on, as you can see:
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2025-12-17T15:44:37.871+00:00 — Leo Moser (mole99) (@mole99)
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2025-12-17T15:44:58.904+00:00 — Leo Moser (mole99) (@mole99)
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If I open `chiptop_A_track__exported.gds` I can see that something is wrong:
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2025-12-17T15:45:08.121+00:00 — Leo Moser (mole99) (@mole99)
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2025-12-17T15:45:35.351+00:00 — Leo Moser (mole99) (@mole99)
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Normally, the design should be centered and fill the whole screen. KLayout thinks that the design is larger than it actually is?
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2025-12-17T15:45:59.602+00:00 — Leo Moser (mole99) (@mole99)
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There is this strange `Axx_top` cell in the cell hierarchy. If I hide it, you can see its outline:
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2025-12-17T15:46:10.668+00:00 — Leo Moser (mole99) (@mole99)
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2025-12-17T15:47:19.72+00:00 — Leo Moser (mole99) (@mole99)
- Message ID:
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- User name: mole99
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Default - Discord message: https://discord.com/channels/1361349522684510449/1450371418922422332/1450877029061885993
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- Archive source: https://discord.wafer.space/wafer-space/Information/questions/magic-error-non-integer-magnification/2025-12/2025-12.json
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If I open the hierarchy of this cell, there are many, many subcells:
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2025-12-17T15:47:22.167+00:00 — Leo Moser (mole99) (@mole99)
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2025-12-17T15:47:45.418+00:00 — Leo Moser (mole99) (@mole99)
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- Archive source: https://discord.wafer.space/wafer-space/Information/questions/magic-error-non-integer-magnification/2025-12/2025-12.json
Content
It seems there is a second separate padring hidden inside this cell?
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2025-12-17T15:49:13.122+00:00 — Leo Moser (mole99) (@mole99)
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Default - Discord message: https://discord.com/channels/1361349522684510449/1450371418922422332/1450877504704221437
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- Archive source: https://discord.wafer.space/wafer-space/Information/questions/magic-error-non-integer-magnification/2025-12/2025-12.json
Content
You need to clean up the layout, but once that's done I think you should be able to use this script:
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2025-12-17T15:50:00.723+00:00 — Leo Moser (mole99) (@mole99)
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- Archive source: https://discord.wafer.space/wafer-space/Information/questions/magic-error-non-integer-magnification/2025-12/2025-12.json
Content
Enable the Nix shell of the template project and run the following (adjust the paths):
```
python3 scripts/merge_chipathon.py chipathon/padring_ws.gds chipathon/chiptop_A_track__exported.gds
```
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2025-12-17T15:50:16.127+00:00 — Leo Moser (mole99) (@mole99)
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2025-12-17T15:51:08.422+00:00 — LuighiV (@luighiv)
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Hi Leo, indeed that come from one of the teams, they joined later as they didn't have a number was assigned Axx 😅 . On the other hand, didn't notice they have a second separated padring there. Let me check that, thanks for noticing 🙂
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2025-12-17T15:53:10.858+00:00 — LuighiV (@luighiv)
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that's great! thank you @Leo Moser (mole99) going to try to clean up and run the script you provided, It will be really helpful, thank you 🙌
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2025-12-17T15:56:09.104+00:00 — Leo Moser (mole99) (@mole99)
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I'm looking forward to your submission :)
Let me know if there are any issues with the script.
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2025-12-17T15:59:05.674+00:00 — LuighiV (@luighiv)
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sure! thank you! 🙂
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2025-12-17T17:29:36.239+00:00 — LuighiV (@luighiv)
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Hi Leo, just to comment that in the klayout version we have in the docker image used during the Chipathon (0.30.2) I cannot see those outlines. I was able to see it just in version 0.30.4. Maybe it is in an improvement in recent versions
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2025-12-17T17:52:26.651+00:00 — Leo Moser (mole99) (@mole99)
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That could very well be 👍
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2025-12-17T17:54:07.587+00:00 — Leo Moser (mole99) (@mole99)
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FYI, after you have merged the designs, you need to run filler generation.
```
klayout -b -zz -r ${PDK_ROOT}/${PDK}/libs.tech/klayout/tech/drc/filler_generation/fill_all.rb -rd input=chip_top.gds -rd output=chip_top_filled.gds
```
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2025-12-17T18:15:26.928+00:00 — LuighiV (@luighiv)
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sure, thank you for sharing it 🙂
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2025-12-17T21:42:13.523+00:00 — LuighiV (@luighiv)
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Hi @Leo Moser (mole99) now the design passed all the checks, thanks for your help 🙂 🙌
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2025-12-18T01:46:11.905+00:00 — Tim 'mithro' Ansell (@mithro_)
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Congradulations! Make sure you click the "Submit for Manufacturing" button!
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2025-12-18T03:09:59.443+00:00 — LuighiV (@luighiv)
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Hi @Tim 'mithro' Ansell yes! I did it, thank you 🙌
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2025-12-18T03:16:51.816+00:00 — Tim 'mithro' Ansell (@mithro_)
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At the current time, it does look like there should be room on the shuttle for your design.
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2025-12-18T03:22:32.583+00:00 — LuighiV (@luighiv)
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that's great! hope the possibility remains open till the end of submission time 🤞
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