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Thread: Magic DRC waving

18 Discord messages from ℹ️ - Information/⁉️-questions/threads/magic-drc-waving.md.

Category: ℹ️ - Information Parent channel: #⁉️-questions Thread ID: 1444703124647313631

Messages: 18

message-1444703124647313631

2025-11-30T14:54:26.202+00:00 — Egor Lukyanchenko (@egorxe)

Content

@Leo Moser (mole99) Will it be possible to wave some Magic DRC errors in precheck as long as all KLayout checks are fine? The problem is I'm inconsistently getting Magic DRC errors in factory provided SRAMs. There are several SRAM macros in [our testchip design](https://github.com/ZeduloTech/gf180mcu-testchip2025/blob/e57c1a503bc76d012670eb28d11fc9468af8396c/final/gds/chip_top.gds.gz) and sometimes weird "Can't overlap those layers" DRC errors are reported inside one or two SRAMs, while others are fine. There is nothing else besides the SRAM internals and dummy fill metals in the DRC area, so it looks like a Magic DRC issue. I'll report the issue itself later, for now I just would like to know if it'll be possible to wave some errors while uploading final GDS to the platform, as I doubt that it'll be possible to debug and fix the issue prior to deadline.

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message-1444721586522558626

2025-11-30T16:07:47.856+00:00 — Leo Moser (mole99) (@mole99)

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Content

Hi Egor, how did you run DRC? Did you use the Nix shell in the template or did you use custom versions of the tools and the PDK?
For the final check you should use https://github.com/wafer-space/gf180mcu-precheck, since it will run in the online precheck.
Other designs haven't had issues with the SRAMs so far, but you need to flatten a number of cells in magic.

Normally, you need to pass both the magic and KLayout DRC deck. Neither DRC deck is a complete implementation and therefore we run both for better coverage.

We will likely waive some magic DRC checks (e.g. CO.3 and CO.4) since they were verified to be slightly inaccurate implementations.
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message-1444722460263055543

2025-11-30T16:11:16.172+00:00 — Egor Lukyanchenko (@egorxe)

Content

I'm running inside the nix environment from the precheck, nothing custom. You could check it yourself with the GDS from the link if you have time, but you have to skip zero polygon check as it will fail on this GDS revision :).
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message-1444753361864888544

2025-11-30T18:14:03.688+00:00 — Leo Moser (mole99) (@mole99)

Content

I'll check it tomorrow, no worries about the zero area polygons for now :)
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message-1444764262789677190

2025-11-30T18:57:22.671+00:00 — Egor Lukyanchenko (@egorxe)

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Content

Thanks, Leo! I've fixed zero area polygons [in the next revision](https://github.com/ZeduloTech/gf180mcu-testchip2025/blob/3f49a9b414d45c7de78c40d2b5e2279501ac4e35/final/gds/chip_top.gds.gz) anyway. Also I saw your review request for the python DRC script, but all my free time is going towards finishing GDS for the tapeout :). I'll try to review the script thoughtfully tomorrow, sorry for the delay.

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message-1444961945278087272

2025-12-01T08:02:53.849+00:00 — Leo Moser (mole99) (@mole99)

Content

Great! I'm running the precheck on the updated GDS now.

By the way, I just noticed that your sealring is still an earlier version (it's missing the glass cut on top). Please make sure to use the latest version of the PDK.

Don't worry about the PR for now, that can wait until after the tapeout.
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message-1444995618555826177

2025-12-01T10:16:42.184+00:00 — Leo Moser (mole99) (@mole99)

Content

The precheck also resulted in magic DRC errors on my end.
They are of type "Can't overlap those layers" and seem to relate to an overlap of COMP in two different cells.
The errors only occur inside the sram128x8, the other SRAMs are not affected.
Taking a closer look at the cells which belong to these COMP layers, sram128x8 is the only one that uses the `xdec16_*` cell.
The other SRAMs use a combination of `xdec8_*` and `xdec32_*`, which are part of `MAGIC_GDS_FLATGLOB`.
It seems the flatglob for `xdec16_*` is missing. I added it to `MAGIC_GDS_FLATGLOB` and started another run 🤞

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message-1445000245942554704

2025-12-01T10:35:05.439+00:00 — Leo Moser (mole99) (@mole99)

Content

`Precheck successfully completed.` That seemed to work 🥳
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message-1445000378235093042

2025-12-01T10:35:36.98+00:00 — Leo Moser (mole99) (@mole99)

Content

I'll push the fix to the template and precheck and then you can give it a try on your end as well.
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message-1445005857820512298

2025-12-01T10:57:23.415+00:00 — Egor Lukyanchenko (@egorxe)

Content

Thanks, Leo!

> Please make sure to use the latest version of the PDK.

The latest version of the PDK or of the nix-eda?
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message-1445007490898067456

2025-12-01T11:03:52.771+00:00 — Leo Moser (mole99) (@mole99)

Content

You're welcome!

> The latest version of the PDK or of the nix-eda?

Both! After you update your template or precheck make sure to run `make clone-pdk` again.
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message-1445008341368705196

2025-12-01T11:07:15.539+00:00 — Egor Lukyanchenko (@egorxe)

Content

I think I'm running the [latest nix environment](https://github.com/ZeduloTech/gf180mcu-testchip2025/blob/acbd33fc43099d885758a78b2fdbfca26950c0f0/flake.nix#L12) and the latest PDK (from Nov 27). Is there a way to check that the correct sealring generation routine is launched?

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message-1445008885390905433

2025-12-01T11:09:25.244+00:00 — Leo Moser (mole99) (@mole99)

Content

You can visually check the corner of your sealring. Yours looks like this:
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message-1445008892584267857

2025-12-01T11:09:26.959+00:00 — Leo Moser (mole99) (@mole99)

Content

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message-1445008973790056529

2025-12-01T11:09:46.32+00:00 — Leo Moser (mole99) (@mole99)

Content

But it should look like this:
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message-1445008978995318959

2025-12-01T11:09:47.561+00:00 — Leo Moser (mole99) (@mole99)

Content

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message-1445011268535582762

2025-12-01T11:18:53.43+00:00 — Egor Lukyanchenko (@egorxe)

Content

Ok, thanks. I've checked my latest GDS and it has this corner structure on 37/0, so it seems that I've updated something meanwhile between the GDS in repo and the current one, but thanks for the warning. With sealring being fine now, I'm waiting for your precheck update :).

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message-1445016696565006498

2025-12-01T11:40:27.573+00:00 — Leo Moser (mole99) (@mole99)

Content

The precheck has been updated: https://github.com/wafer-space/gf180mcu-precheck/releases/tag/1.3.1
However, it will take more time until the online precheck uses this version as well :)

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