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Thread: LVPWELL

3 Discord messages from ℹ️ - Information/⁉️-questions/threads/lvpwell.md.

Category: ℹ️ - Information Parent channel: #⁉️-questions Thread ID: 1522831168905412791

Messages: 3

message-1522831168905412791

2026-07-04T05:07:23.502+00:00 — tnt (@246tnt)

Content

Is that layer necessary ? What does it do exactly ?
Because I can draw a thin gate nmos (i.e. without the `DualGate` layer) without `LVPWELL` and it doesn't seem to change how it's extracted and it doesn't violate DRC either.
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message-1522838521922977894

2026-07-04T05:36:36.598+00:00 — bailey (@bailey8889)

Content

I believe `LVPWELL` is used inside deep nwells to create an isolated pwell for nmos with bulk connections other than ground.
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message-1522844924465250456

2026-07-04T06:02:03.083+00:00 — tnt (@246tnt)

Content

Ok, so when outside deep-nwell it doesn't matter. Good to know ! Tx.
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