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Thread: Are plans for opening up sky90 PDK cancelled?

33 Discord messages from ℹ️ - Information/⁉️-questions/threads/are-plans-for-opening-up-sky90-pdk-cancelled.md.

Category: ℹ️ - Information Parent channel: #⁉️-questions Thread ID: 1517815919932608573

Messages: 33

message-1517815919932608573

2026-06-20T08:58:34.968+00:00 — rahulbhagwat

Content

Are there any plans from skywater to offer MPWs on this PDK or is this dead?

https://github.com/google/sky90fd-pdk
https://opensource.googleblog.com/2022/07/SkyWater-and-Google-expand-open-source-program-to-new-90nm-technology.html

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message-1517818806322466937

2026-06-20T09:10:03.137+00:00 — Andrew Wingate (@anfroholic)

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Content

Currently wafer.space only has plans on offering wafers based on GF180MCU

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message-1517819030038380614

2026-06-20T09:10:56.475+00:00 — rahulbhagwat

Content

yeah i thought it would be good to ask here since tim spearheaded open sourcing these at google so figured he would have more info
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message-1517902865648193617

2026-06-20T14:44:04.442+00:00 — Lofty (@ravenslofty)

Content

perhaps this is not mine to say: but sky130 with its 8 MPW runs was more mature than gf180mcu's 1 MPW run at time of founding of w.s, yet Tim voted with his wallet to use gf180mcu.

one must imagine he had very bad experiences with skywater to reject it like that.
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message-1517924550266851388

2026-06-20T16:10:14.458+00:00 — bailey (@bailey8889)

Content

not mine to say either, but older processes generally take less time to fabricate and are cheaper. Also chipfoundry was already handling sky130, ihp is running it's own mpw, so from an open-source ecosystem standpoint, supporting gf makes sense.
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message-1517957755309129839

2026-06-20T18:22:11.157+00:00 — Christopher (@fossify_37988)

Content

gf180mcu has more cool analog features too
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message-1517985988318724227

2026-06-20T20:14:22.431+00:00 — namibj

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huh, anything in particular?
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message-1517986506680303689

2026-06-20T20:16:26.018+00:00 — namibj

Content

(though yes, FDSOI is decently far from bulk CMOS (especially if the latter has deep-nwell and native nmos "implants" available), e.g. I'd guess vertical BJTs are not a thing on FDSOI processes)
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message-1517991865436078210

2026-06-20T20:37:43.645+00:00 — Christopher (@fossify_37988)

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Content

ldmos too. looking at the pdk though gf seems to be much better characterized more broadly
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message-1518144139999445052

2026-06-21T06:42:48.73+00:00 — tnt (@246tnt)

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Content

gf180mcu is _much_ cheaper (about 2x IIRC) ... Tim's stated goal is not MPW but small volume custom chip production at 1$/chip so that also made WS. much closer to targer when starting.

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message-1518144269125160981

2026-06-21T06:43:19.516+00:00 — Lofty (@ravenslofty)

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Content

I am aware of what Tim says, and I am also aware of what Tim *does*
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message-1518147437213257848

2026-06-21T06:55:54.847+00:00 — Andrew Wingate (@anfroholic)

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Having just spent a lot of time with Tim and asking many questions, I feel like I can say a few things.
@tnt is quite spot on and in that light Global Foundries seems like the best choice overall.
For one, price, and GF also has a lot more resources when it comes to things that are most beneficial regarding more goals in the general open source silicon ecosystem.
Part of Tim's thesis (and I also agree) is that it's beneficial to have for profit institutions involved and benefiting from open silicon and the tools/people/etc. surrounding it.
Taking all these into consideration Skywater is less suited in many areas and doesn't take into account the logistics required to support another foundry. For these and other reasons, I would say to stick to GF only, and this is coming from someone who lives a few hours from them.
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message-1518147633116483705

2026-06-21T06:56:41.554+00:00 — Andrew Wingate (@anfroholic)

Content

*I am a few hours from Skywater
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message-1518176083642552360

2026-06-21T08:49:44.688+00:00 — Oliver (@olexorus)

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Cheaper by which metric? Because a Sky130 TinyTapeout shuttle contains roughly 3x as many tiles as a GF180MCU one (512 vs 160), while the Chipfoundry slot is only twice as expensive (15k vs 7.5k). Of course that ignores the fact that with wafer.space you get many more parts back, but if we ignore that, Sky130 seems cheaper than GF180MCU relative to the amount of logic you get, not the other way around.
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message-1518179413290647754

2026-06-21T09:02:58.538+00:00 — tnt (@246tnt)

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@Oliver Cheaper as in "what's the minimum amount of cash you need to spend to make a run" which basically comes down to the price of the mask set.
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message-1518180026455949362

2026-06-21T09:05:24.728+00:00 — tnt (@246tnt)

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And the "ignore you get many more parts back" is the whole point. As said above, the goal here is _production_ use, not mpw where you're happy with 10 parts. So having many parts is important.

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message-1518181186885779517

2026-06-21T09:10:01.396+00:00 — Oliver (@olexorus)

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Ah, makes sense. But I thought the number of parts doesn't actually make a big difference for price (at these low parts counts, e.g. 10 vs 1000), it's just an arbitrary decision by the people running the MPW shuttle to make people use more expensive services for production use. So while that is a big advantage of wafer.space, it shouldn't say much about the production cost of Sky130? I.e. they could decide to ship more parts and it wouldn't change the price significantly?
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message-1518182740191871059

2026-06-21T09:16:11.733+00:00 — tnt (@246tnt)

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It's not huge but it's not nothing, probably would be about 15~20% more expensive if my quick math from the rough number I know are correct.  Assuming die only like w.s.  ( for chipfoundry packaging cost is not cheap, one of the reason you only get 100 ).
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message-1518505905266622515

2026-06-22T06:40:20.291+00:00 — Tim 'mithro' Ansell (@mithro_)

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Well, I also delibrately wanted something *outside* the US

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message-1518506081544831058

2026-06-22T06:41:02.319+00:00 — Tim 'mithro' Ansell (@mithro_)

Reply/reference

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Yes, SKY90FD was cancelled for many different reasons outside of Google's control.
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message-1518516743687897148

2026-06-22T07:23:24.372+00:00 — Oliver (@olexorus)

Reply/reference

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Do you think it's likely that there will be new/more advanced open PDKs in the next years?
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message-1518517166633123851

2026-06-22T07:25:05.21+00:00 — Tim 'mithro' Ansell (@mithro_)

Reply/reference

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Unclear. I think being successful with the current PDKs is the first step. Successful == improve a foundries bottom line.

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message-1518697740089954327

2026-06-22T19:22:37.277+00:00 — namibj

Reply/reference

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There's the Japanese one, but it's a 1000nm 5V CMOS node.
And I don't think it offers ldmos, and at best it mildly beats w.s. per-transistor "if you ignore not getting 1~2 orders of magnitude fewer dies".
(I believe figuring out how to package smaller dies on w.s. would fully cancel that per-custom-design cost difference by making 1/8th tiles "usable".)
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message-1518866323147329589

2026-06-23T06:32:30.61+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

I do think there will be more open PDKs
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message-1518866506929410209

2026-06-23T06:33:14.427+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

There is the ICSprout55 node and the Indian 180nm node that seem like they might appear at some time. Someone should also keep poking Pragmatic for their 800nm non-cmos node.

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message-1518874675655082074

2026-06-23T07:05:42.003+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

Bunnie is getting in a few years after the AI bubble implodes there will probably end up being a 28nm node or two
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message-1518875588092231751

2026-06-23T07:09:19.545+00:00 — tnt (@246tnt)

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I wouldn't call ICSprout55 "open" ... it's about as open as a FPGA is  ... you get abstracted view for the digital cells, no DRC rules or device or spice model for custom design. You have exactly what you need to do a pure digital design using only the exact cell they provide and you never get to see the actual GDS or how it's made.
They've been saying "yeah yeah it will come" but then, no changes in the past 8 months.
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message-1519234855869878402

2026-06-24T06:56:55.658+00:00 — Tim 'mithro' Ansell (@mithro_)

Reply/reference

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That is why I say "might appear at some time" rather than "already exists" 🙂
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message-1526921965691080704

2026-07-15T12:02:45.459+00:00 — Chips4Makers aka Staf Verhaegen (@chips4makers)

Reply/reference

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They actually have the GDS of the cells also released but is a tarball as asset to a release: https://github.com/openecos-projects/icsprout55-pdk/releases

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message-1526922049270845521

2026-07-15T12:03:05.386+00:00 — namibj

Content

woa nice
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message-1526922232608194681

2026-07-15T12:03:49.097+00:00 — Chips4Makers aka Staf Verhaegen (@chips4makers)

Content

There was a presentation from them @FSiC. It's not clear when they will actually offer tape-out capability outside their university program.
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message-1526923313408901200

2026-07-15T12:08:06.78+00:00 — namibj

Content

(assuming they aren't relying on special cased SCL marker regions for allowing patterns (e.g. due to taped-out-verified OPC tunings or such) in those cells that would not be generally legal to use, it should be feasible to extract a DRC deck from that SCL that's at least "applicable" to designs that are shaped vaguely like an SCL; main barriers I'd guess would be knowing how wide/long transistors are allowed to be and likely to some extend how aggressive latchup-prone structures can be packed, as AFAIK those are handled rather conservatively and typically not expected to be triggered by normal SCL usage.)
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message-1526924021952811079

2026-07-15T12:10:55.71+00:00 — namibj

Reply/reference

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Being able to design a layout for a real process that one could go to the fab and do whatever necessary to convince them that they actually want to quote you, and then get that quote, pay, and tape out that very exact design.... that's already a _massive_ improvement over having to sign an NDA that'll likely cover fine structure details of the resulting layout depending on how strongly they guard their DRC specifications.
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