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Thread: Small Risc-V cores

15 Discord messages from ℹ️ - Information/general/threads/small-risc-v-cores.md.

Category: ℹ️ - Information Parent channel: #general Thread ID: 1419342801732239360

Messages: 15

message-1419404965390319636

2025-09-21T19:28:35.018+00:00 — RebelMike (@rebelmike)

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message-1419404968133398580

2025-09-21T19:28:35.672+00:00 — RebelMike (@rebelmike)

Content

We've realised that the biggest constraint is really the size of the pads.  You're going to want a QSPI interface to some RAM and flash, so that's 7 or preferably 12 IOs.  And then 4 or 8 IOs for actually doing something.  By the time you've made that pad ring you might as well put at least enough RAM in it for registers.

But yes, I believe SERV can be configured to store registers in external RAM, that will be extremely slow though!

I think going for RV32E (only 15 registers) makes sense.  Also if you support the compressed instructions (which is good to save flash bandwidth if you have no/minimal icache) they mostly can only use registers that are in RV32E anyway.
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message-1419405295297368064

2025-09-21T19:29:53.674+00:00 — RebelMike (@rebelmike)

Content

I put together a spreadsheet for possible pad setups on a subdivided chip.  I don't know if the "pad strip" idea (pads on one side only) works in practice. https://docs.google.com/spreadsheets/d/1qEPO6t-Uz7HYwtpl9eECe0vx1UJSmiynZBl_LVMHF0k/edit?gid=0#gid=0

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message-1419405825990197268

2025-09-21T19:32:00.201+00:00 — Tholin (@tholin)

Content

I believe smaller pads are theoretically possible if you're willing to reduce output drive strength and reduce the effectiveness of the ESD protection.
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message-1419406647432057026

2025-09-21T19:35:16.048+00:00 — tnt (@246tnt)

Content

Technically nothing forces you to make a ring ... you could have a "strip"of pads on one side only.
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message-1419406827476488324

2025-09-21T19:35:58.974+00:00 — tnt (@246tnt)

Content

(I mean from a functional stand point, that might not be directly supported in the tooling)
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message-1419406997798780960

2025-09-21T19:36:39.582+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

There is also this thing called "circuit under pads"
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message-1419407610578210969

2025-09-21T19:39:05.68+00:00 — tnt (@246tnt)

Content

Is that allowed here ? And compatible with the bonding method ?  I know in both ihp and sky, placing anything active under the pad is a not an option.  And on sky in early mpw some people had high failure rate when bonding because there was some stuff under the pad that was getting crushed.
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message-1419407695055945839

2025-09-21T19:39:25.821+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

https://gf180mcu-pdk.readthedocs.io/en/latest/physical_verification/design_manual/drm_09_3.html
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message-1419407781353750570

2025-09-21T19:39:46.396+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

> Active circuits are allowed when ball-type wire-bonding process is used and when bumping/flip chip technology is used. No circuit under pad is allowed when wedge-type wire-bonding process is used. The following additional rules apply to designs when active circuits are used under the pad.
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message-1419410756029382739

2025-09-21T19:51:35.614+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

15 pins == 4 for spi bus, 3 for power, 8 for I/O?
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message-1419412077134741575

2025-09-21T19:56:50.59+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

BTW I expect it'll take us a while to figure out what options make sense
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message-1419413258393227575

2025-09-21T20:01:32.224+00:00 — RebelMike (@rebelmike)

Content

I was thinking the 15 would be 7 for QSPI, 2 for power, clock, reset, 4 for IO.  But actually I think you could get 16 in that width and have an extra ground.
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message-1419430918749163712

2025-09-21T21:11:42.781+00:00 — Tim 'mithro' Ansell (@mithro_)

Content

I tend to think of 10 I/O as a good number as it ends up with a byte and 2 "control/signal lines"
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message-1419442227767148584

2025-09-21T21:56:39.061+00:00 — RebelMike (@rebelmike)

Content

Yeah, only 4 GPIOs is a bit sad.  Going to pins on 2 sides and 3x3 division might be a better option.  Or 5x2 with a single strip but the other way.
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