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Thread: gf180mcu_as_sc_mcu7t3v3-example_project

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Category: ℹ️ - Information Parent channel: #general Thread ID: 1443386480809480285

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message-1443388069993779280

2025-11-26T23:48:52.74+00:00 — bailey (@bailey8889)

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message-1443388073462202559

2025-11-26T23:48:53.567+00:00 — bailey (@bailey8889)

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@Tholin Sorry, but I don't think my Mac has enough umph to run a design that size. If you get partial logs/reports you can send them to me.

I've seen long run times when the fill/cap cells aren't parallelized before comparison. May not be relevant.
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message-1444450873941168250

2025-11-29T22:12:04.947+00:00 — Tholin (@tholin)

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message-1444451936568086538

2025-11-29T22:16:18.297+00:00 — bailey (@bailey8889)

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Thanks, I'll check later today.
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message-1444665142078865509

2025-11-30T12:23:30.452+00:00 — bailey (@bailey8889)

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@Tholin the setup file for `gf180mcuD` provides for parallel reduction of `fillcap` cells but not `decap` cells. If you are creating a new standard cell library for `gf180mcu_as_sc_mcu7t3v3` then I suggest you either,
1. rename the `decap` cells to `fillcap` to match the `5v0` libraries or
2. modify the netgen setup file to reduce parallel `decap` cells.
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message-1444741458979721407

2025-11-30T17:26:45.819+00:00 — Tholin (@tholin)

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I did this and its still taking forever. There are also still warnings in the log that I don”t see with the 5V SCL
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message-1444741757031022632

2025-11-30T17:27:56.88+00:00 — Tholin (@tholin)

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message-1444794838884290681

2025-11-30T20:58:52.58+00:00 — bailey (@bailey8889)

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The first is due to yosys adding buffers to increase capacitance on nets (I think). The outputs are unconnected - normal.
The second is netgen output saying that it was told to ignore a parameter that did not exist on a device - also normal.

If you could send me the partial log, I can take a look at it.
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