---
page_id: curated-tooling
type: context-page
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template_id: curated-knowledge
template_version: template-0.1.0
title: LibreLane and Tooling
slug: curated-tooling
route: /librelane-and-tooling
section: reference
access: public
summary: Roles and boundaries of LibreLane, OpenROAD, Yosys, KLayout, Magic, Netgen, Nix, Ciel, and the PDK.
status: published
asset_base: .
home_href: /
md_url: /librelane-and-tooling.md
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tags: [wafer-space, knowledge-base, curated]
last_updated: 2026-08-19
talk_url: /librelane-and-tooling.talk.md
talk_route: /librelane-and-tooling/talk
---

# LibreLane and Tooling

## Scope

This page explains the main tools in the wafer.space digital flow. Version pins belong on [Version Management](/librelane-and-tooling/version-management). Symptom-and-remedy procedures belong under [Troubleshooting](/troubleshooting).

## Tool roles

- **LibreLane:** drives the digital flow and its ordered steps. Project Template 1.4.0 moved to LibreLane 3.0 on 2026-03-26. [Evidence](/evidence/designing/project-template#message-1486728700518203616) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1486728700518203616))
- **Yosys:** synthesizes RTL and performs synthesis checks. Check details appear in `yosys-synthesis.log` near `Executing CHECK pass`, and may appear in `reports/pre_synth_chk.rpt`. [Evidence](/evidence/i-information/questions/threads/yosys-check-errors-found#message-1440439686526144552) ([Discord](https://discord.com/channels/1361349522684510449/1440427510159638538/1440439686526144552))
- **OpenROAD:** performs physical-design work such as clock-tree synthesis, routing, STA, GUI inspection, and ECO operations. The recorded hold-failure procedure used OpenROAD post-PNR reports and LibreLane ECO insertion. [Evidence](/evidence/i-information/questions/threads/failing-hold-checks#message-1445872535160885409) ([Discord](https://discord.com/channels/1361349522684510449/1445866342438932643/1445872535160885409))
- **KLayout:** runs the principal rule deck, displays marker databases, and can run a reduced cell through the same deck. An exact single-cell command was recorded on 2025-11-27. [Evidence](/evidence/i-information/general/threads/using-gf180mcuocdio-in-librelane#message-1443614548182568971) ([Discord](https://discord.com/channels/1361349522684510449/1443243481744277565/1443614548182568971))
- **Magic and Netgen:** Magic imports or streams layout and extracts LVS data; Netgen reports the comparison. In one investigation, `lvs.netgen.rpt` contained more useful detail than the final summary. [Evidence](/evidence/designing/project-template/threads/pure-digital-no-hard-macros-no-sram#message-1446665494374646050) ([Discord](https://discord.com/channels/1361349522684510449/1445210755434549288/1446665494374646050))
- **`open_pdks` and Ciel:** Project Template 1.5.0 used Ciel to manage the `open_pdks` build and exposed SCL, pad, and SRAM choices. [Evidence](/evidence/designing/project-template#message-1511722026648338514) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1511722026648338514))
- **Nix:** pins the flow environment. A local-versus-CI investigation compared `flake.nix` and `flake.lock`, tested the vanilla template, and used `nix flake update` only when changing the pins intentionally. [Evidence](/evidence/designing/project-template/threads/only-thing-i-can-think-of-is-the-nix#message-1512740258649870336) ([Discord](https://discord.com/channels/1361349522684510449/1512739634692489366/1512740258649870336))

## Current dated baseline

- **Confirmed fact — 2026-05-27:** wafer.space PDK changes had been upstreamed to `open_pdks`; Ciel adoption and experimental community IP support were being added to the project template. [Evidence](/evidence/designing/project-template#message-1509176448223674489) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1509176448223674489))
- **Confirmed fact — 2026-06-03:** Template 1.5.0 added a parallel DRC runner. Its rule was `threads * workers = hardware threads`; users could reduce workers when memory use was too high. [Evidence](/evidence/designing/project-template#message-1511722026648338514) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1511722026648338514))
- **Decision — inferred record rule:** Save the template tag, LibreLane commit, PDK commit, `flake.lock`, tool versions, precheck image or tag, and GDS hash as one build record. This rule is inferred from the PDK transition and a local-versus-CI mismatch; it is not a quoted wafer.space policy. [PDK evidence](/evidence/designing/project-template#message-1509176448223674489) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1509176448223674489)) [Nix evidence](/evidence/designing/project-template/threads/only-thing-i-can-think-of-is-the-nix#message-1512912751641628845) ([Discord](https://discord.com/channels/1361349522684510449/1512739634692489366/1512912751641628845))

## Boundaries

- **Obsolete guidance:** The old wafer.space PDK fork was required by the October 2025 precheck/template path. It is historical for new projects after the 2026 `open_pdks` transition, but may still be needed to reproduce an old run. [Old fork evidence](/evidence/i-information/questions/threads/gf180mcud-lvs-check-error-layout-cell-pin-orde#message-1433880759130783755) ([Discord](https://discord.com/channels/1361349522684510449/1433688821479772180/1433880759130783755)) [Replacement evidence](/evidence/designing/project-template#message-1509176448223674489) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1509176448223674489))
- **Open question:** Exact current tool and image versions are not established by the archive. Use the pins in the chosen current template, then record them with the result. This caution follows from a case where local KLayout XOR failed while GitHub CI passed. [Evidence](/evidence/designing/project-template/threads/only-thing-i-can-think-of-is-the-nix#message-1512912751641628845) ([Discord](https://discord.com/channels/1361349522684510449/1512739634692489366/1512912751641628845))

## Related pages

- [Digital Design](/digital-design)
- [Version Management](/librelane-and-tooling/version-management)
- [DRC and LVS](/troubleshooting/drc-and-lvs)
- [Tool Failures](/troubleshooting/tool-failures)
- [Process and PDK](/process-and-pdk)
- [Timing and ECO](/digital-design/timing-and-eco)

## Sources

- `1486728700518203616` — 2026-03-26T14:09:04.287+00:00 — Leo Moser (mole99) (@mole99) — LibreLane 3.0 transition. [Evidence](/evidence/designing/project-template#message-1486728700518203616) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1486728700518203616))
- `1440439686526144552` — 2025-11-18T20:33:03.343+00:00 — aedancullen — Yosys log and report locations. [Evidence](/evidence/i-information/questions/threads/yosys-check-errors-found#message-1440439686526144552) ([Discord](https://discord.com/channels/1361349522684510449/1440427510159638538/1440439686526144552))
- `1445872535160885409` — 2025-12-03T20:21:15.395+00:00 — Lofty (@ravenslofty) — OpenROAD STA reports and ECO. [Evidence](/evidence/i-information/questions/threads/failing-hold-checks#message-1445872535160885409) ([Discord](https://discord.com/channels/1361349522684510449/1445866342438932643/1445872535160885409))
- `1443614548182568971` — 2025-11-27T14:48:49.348+00:00 — tnt (@246tnt) — reduced KLayout cell run. [Evidence](/evidence/i-information/general/threads/using-gf180mcuocdio-in-librelane#message-1443614548182568971) ([Discord](https://discord.com/channels/1361349522684510449/1443243481744277565/1443614548182568971))
- `1446665494374646050` — 2025-12-06T00:52:11.604+00:00 — bailey (@bailey8889) — detailed Netgen report. [Evidence](/evidence/designing/project-template/threads/pure-digital-no-hard-macros-no-sram#message-1446665494374646050) ([Discord](https://discord.com/channels/1361349522684510449/1445210755434549288/1446665494374646050))
- `1509176448223674489` — 2026-05-27T12:48:24.399+00:00 — Leo Moser (mole99) (@mole99) — upstream `open_pdks` transition. [Evidence](/evidence/designing/project-template#message-1509176448223674489) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1509176448223674489))
- `1511722026648338514` — 2026-06-03T13:23:37.59+00:00 — Leo Moser (mole99) (@mole99) — Template 1.5.0, Ciel, libraries, and parallel DRC. [Evidence](/evidence/designing/project-template#message-1511722026648338514) ([Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1511722026648338514))
- `1512740258649870336` — 2026-06-06T08:49:43.017+00:00 — Leo Moser (mole99) (@mole99); `1512912751641628845` — 2026-06-06T20:15:08.551+00:00 — RebelMike (@rebelmike) — Nix lock and local-versus-CI diagnosis. [Evidence 1](/evidence/designing/project-template/threads/only-thing-i-can-think-of-is-the-nix#message-1512740258649870336) ([Discord](https://discord.com/channels/1361349522684510449/1512739634692489366/1512740258649870336)) [Evidence 2](/evidence/designing/project-template/threads/only-thing-i-can-think-of-is-the-nix#message-1512912751641628845) ([Discord](https://discord.com/channels/1361349522684510449/1512739634692489366/1512912751641628845))
- `1433880759130783755` — 2025-10-31T18:10:13.193+00:00 — Leo Moser (mole99) (@mole99) — old wafer.space PDK fork requirement. [Evidence](/evidence/i-information/questions/threads/gf180mcud-lvs-check-error-layout-cell-pin-orde#message-1433880759130783755) ([Discord](https://discord.com/channels/1361349522684510449/1433688821479772180/1433880759130783755))
