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page_id: curated-glossary
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template_version: template-0.1.0
title: Glossary
slug: curated-glossary
route: /glossary
section: reference
access: public
summary: Definitions for wafer.space process, layout, verification, packaging, and tool terms.
status: published
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home_href: /
md_url: /glossary.md
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tags: [wafer-space, knowledge-base, curated]
last_updated: 2026-08-19
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---

# Glossary

This glossary defines terms as used in the wafer.space archive. Foundry manuals and current tool documentation remain authoritative for detailed technical definitions.

## Process and allocation

- **GF180MCU / `gf180mcuD`** — The process family used by wafer.space and the `gf180mcuD` run variant named in the cited discussion. ([archive message](/evidence/i-information/questions/threads/what-mimcaps-can-we-use-on-gf180mcu#message-1512712326745423975); [Discord](https://discord.com/channels/1361349522684510449/1511221611238522991/1512712326745423975))
- **MPW** — Multi-project wafer. The cited explanation describes Tiny Tapeout as several projects sharing one die, with that die then placed as one project on a multi-project wafer. ([archive message](/evidence/i-information/general#message-1503782063680126997); [Discord](https://discord.com/channels/1361349522684510449/1361349523724570941/1503782063680126997))
- **Slot** — A purchased die-area allocation. Quarter, half-height, half-width, and 1x1 forms appear in the archive. ([archive message](/evidence/designing/project-template#message-1450226544965324943); [Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1450226544965324943))
- **Reticle** — The combined project layout exposed repeatedly across the wafer. ([archive message](/evidence/i-information/general/threads/i-have-thought-about-that-idea-too#message-1445599978696347821); [Discord](https://discord.com/channels/1361349522684510449/1445259386464374827/1445599978696347821))

## Layout and verification

- **GDS / GDSII** — Layout data read by precheck and emitted as the final fabrication layout. ([archive message](/evidence/designing/die-sorter#message-1421044969031860327); [Discord](https://discord.com/channels/1361349522684510449/1419841819138854993/1421044969031860327))
- **Precheck** — The wafer.space acceptance flow described as reading GDS, running checks, inserting the project ID, and producing fabrication GDS. ([archive message](/evidence/designing/die-sorter#message-1421044969031860327); [Discord](https://discord.com/channels/1361349522684510449/1419841819138854993/1421044969031860327))
- **DRC** — Design-rule check. The archive's explicit tapeout guidance assigns authority to KLayout DRC. ([archive message](/evidence/designing/project-template/threads/chore-update-to-librelane-dev-55-w#message-1483013259635327016); [Discord](https://discord.com/channels/1361349522684510449/1482918666042347791/1483013259635327016))
- **LVS** — Layout versus schematic check. The template example was reported DRC- and LVS-clean. ([archive message](/evidence/designing/project-template#message-1423349035892478074); [Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1423349035892478074))
- **PEX** — Parasitic extraction. The archive says Magic can extract pwell and isosub resistance during PEX even though public resistor models were not listed for them. ([archive message](/evidence/i-information/questions/threads/are-there-spice-models-for-pwell-resistors#message-1513436381781950605); [Discord](https://discord.com/channels/1361349522684510449/1513073805289848942/1513436381781950605))
- **Seal ring** — Outer protective structure inserted by the project-template flow after user GDS streamout. ([archive message](/evidence/designing/project-template#message-1423349035892478074); [Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1423349035892478074))

## I/O and packaging

- **Pad frame / pad ring** — The die-edge I/O and power-pad arrangement. CoB compatibility depends on expected bond-pad coordinates and power/ground pads. ([archive message](/evidence/designing/cob#message-1425749959227080724); [Discord](https://discord.com/channels/1361349522684510449/1408134567491145728/1425749959227080724))
- **CoB** — Chip on board. The die is wire-bonded to a small PCB which can connect to a motherboard. ([archive message](/evidence/designing/cob#message-1450889190068981913); [Discord](https://discord.com/channels/1361349522684510449/1408134567491145728/1450889190068981913))
- **Wire bond** — Fine connection from a die bond pad to a PCB bond finger. Early Run 1 failures were thought likely to involve wires lifting from pads. ([archive message](/evidence/admin/announcements#message-1497771485966897273); [Discord](https://discord.com/channels/1361349522684510449/1361349523724570938/1497771485966897273))
- **Mezzanine** — The 70-pin board-to-board connector described between the CoB PCB and a motherboard. ([archive message](/evidence/designing/cob#message-1429068742108909638); [Discord](https://discord.com/channels/1361349522684510449/1408134567491145728/1429068742108909638))
- **WLCSP** — Wafer-level chip-scale packaging. It was discussed as having good unit economics at quantity but high low-volume setup and assembly cost. ([archive message](/evidence/i-information/general#message-1533828923555840230); [Discord](https://discord.com/channels/1361349522684510449/1361349523724570941/1533828923555840230))

## Analog options

- **MIM-B** — Metal-insulator-metal capacitor option. **Community claim, not controlled fact:** one message names it as usable, but the selected run option remains unresolved. See [Process options and open questions](/process-and-pdk/options-and-open-questions). ([archive message](/evidence/i-information/questions/threads/what-mimcaps-can-we-use-on-gf180mcu#message-1511240045099483146); [Discord](https://discord.com/channels/1361349522684510449/1511221611238522991/1511240045099483146))
- **High-res poly** — High-sheet-resistance polysilicon option. **Community claim, not controlled fact:** one message names 1 kΩ/square, but the selected run value remains unresolved. See [Process options and open questions](/process-and-pdk/options-and-open-questions). ([archive message](/evidence/i-information/questions/threads/what-mimcaps-can-we-use-on-gf180mcu#message-1512712326745423975); [Discord](https://discord.com/channels/1361349522684510449/1511221611238522991/1512712326745423975))

## Tool names

**KLayout, Magic, Netgen, LibreLane, and OpenROAD** are related layout, verification, and implementation tools. They are not interchangeable. See [LibreLane and Tooling](/librelane-and-tooling) and [Analog Layout, Verification, and PEX](/analog-design/layout-verification-and-pex) for their cited roles. ([archive message](/evidence/designing/analog#message-1515650076645523457); [Discord](https://discord.com/channels/1361349522684510449/1408135265427394661/1515650076645523457)) ([archive message](/evidence/designing/project-template#message-1511722026648338514); [Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1511722026648338514))

## Related pages

- [Process and PDK](/process-and-pdk)
- [Analog Design](/analog-design)
- [Packaging and Chip on Board](/packaging-and-cob)
- [LibreLane and Tooling](/librelane-and-tooling)
- [Community Resources](/community-resources)

## Sources

- `1421044969031860327` — 2025-09-26T08:05:22.356Z — Leo Moser (mole99) — [archive message](/evidence/designing/die-sorter#message-1421044969031860327); [Discord](https://discord.com/channels/1361349522684510449/1419841819138854993/1421044969031860327) — GDS and precheck.
- `1423349035892478074` — 2025-10-02T16:40:54.703Z — Leo Moser (mole99) — [archive message](/evidence/designing/project-template#message-1423349035892478074); [Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1423349035892478074) — LVS and seal ring.
- `1425749959227080724` — 2025-10-09T07:41:19.433Z — Leo Moser (mole99) — [archive message](/evidence/designing/cob#message-1425749959227080724); [Discord](https://discord.com/channels/1361349522684510449/1408134567491145728/1425749959227080724) — Pad frame.
- `1429068742108909638` — 2025-10-18T11:28:58.932Z — Andrew Wingate — [archive message](/evidence/designing/cob#message-1429068742108909638); [Discord](https://discord.com/channels/1361349522684510449/1408134567491145728/1429068742108909638) — Mezzanine connector.
- `1445599978696347821` — 2025-12-03T02:18:12.870Z — Tim 'mithro' Ansell — [archive message](/evidence/i-information/general/threads/i-have-thought-about-that-idea-too#message-1445599978696347821); [Discord](https://discord.com/channels/1361349522684510449/1445259386464374827/1445599978696347821) — Reticle.
- `1450226544965324943` — 2025-12-15T20:42:32.226Z — RebelMike — [archive message](/evidence/designing/project-template#message-1450226544965324943); [Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1450226544965324943) — Slot forms.
- `1450889190068981913` — 2025-12-17T16:35:39.130Z — Andrew Wingate — [archive message](/evidence/designing/cob#message-1450889190068981913); [Discord](https://discord.com/channels/1361349522684510449/1408134567491145728/1450889190068981913) — CoB.
- `1483013259635327016` — 2026-03-16T08:05:14.151Z — Leo Moser (mole99) — [archive message](/evidence/designing/project-template/threads/chore-update-to-librelane-dev-55-w#message-1483013259635327016); [Discord](https://discord.com/channels/1361349522684510449/1482918666042347791/1483013259635327016) — DRC.
- `1497771485966897273` — 2026-04-26T01:29:09.503Z — Tim 'mithro' Ansell — [archive message](/evidence/admin/announcements#message-1497771485966897273); [Discord](https://discord.com/channels/1361349522684510449/1361349523724570938/1497771485966897273) — Wire-bond failure mode.
- `1503782063680126997` — 2026-05-12T15:33:02.901Z — BreakingTaps — [archive message](/evidence/i-information/general#message-1503782063680126997); [Discord](https://discord.com/channels/1361349522684510449/1361349523724570941/1503782063680126997) — MPW.
- `1511240045099483146` — 2026-06-02T05:28:24.234Z — tnt — [archive message](/evidence/i-information/questions/threads/what-mimcaps-can-we-use-on-gf180mcu#message-1511240045099483146); [Discord](https://discord.com/channels/1361349522684510449/1511221611238522991/1511240045099483146) — MIM-B.
- `1511722026648338514` — 2026-06-03T13:23:37.590Z — Leo Moser (mole99) — [archive message](/evidence/designing/project-template#message-1511722026648338514); [Discord](https://discord.com/channels/1361349522684510449/1423348662318272592/1511722026648338514) — LibreLane and implementation tools.
- `1512712326745423975` — 2026-06-06T06:58:43.532Z — tnt — [archive message](/evidence/i-information/questions/threads/what-mimcaps-can-we-use-on-gf180mcu#message-1512712326745423975); [Discord](https://discord.com/channels/1361349522684510449/1511221611238522991/1512712326745423975) — Process variant and high-res poly.
- `1513436381781950605` — 2026-06-08T06:55:51.705Z — Leo Moser (mole99) — [archive message](/evidence/i-information/questions/threads/are-there-spice-models-for-pwell-resistors#message-1513436381781950605); [Discord](https://discord.com/channels/1361349522684510449/1513073805289848942/1513436381781950605) — PEX.
- `1515650076645523457` — 2026-06-14T09:32:17.689Z — Leo Moser (mole99) — [archive message](/evidence/designing/analog#message-1515650076645523457); [Discord](https://discord.com/channels/1361349522684510449/1408135265427394661/1515650076645523457) — Tool roles.
- `1533828923555840230` — 2026-08-03T13:28:32.539Z — Tim Edwards — [archive message](/evidence/i-information/general#message-1533828923555840230); [Discord](https://discord.com/channels/1361349522684510449/1361349523724570941/1533828923555840230) — WLCSP.