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title: "Thread: Sylvain is working on a ROM compiler"
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route: /evidence/i-information/general/threads/sylvain-is-working-on-a-rom-compiler
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summary: 14 Discord messages from ℹ️ - Information/general/threads/sylvain-is-working-on-a-rom-compiler.md.
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last_updated: 2026-08-19
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---

# Thread: Sylvain is working on a ROM compiler

Category: **ℹ️ - Information**
Parent channel: **#general**
Thread ID: `1528307350790733886`

Messages: **14**

## message-1528320505801871391

**2026-07-19T08:40:03.405+00:00 — tnt (@246tnt)**

- Message ID: `1528320505801871391`
- Author ID: `596068704471482370`
- Nickname: tnt
- User name: 246tnt
- Type: `21`
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528320505801871391
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

**Reply/reference**
- https://discord.com/channels/1361349522684510449/1361349523724570941/1528307350790733886
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```text

```

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## message-1528320511543738368

**2026-07-19T08:40:04.774+00:00 — tnt (@246tnt)**

- Message ID: `1528320511543738368`
- Author ID: `596068704471482370`
- Nickname: tnt
- User name: 246tnt
- Type: `Default`
- Edited: 2026-07-19T09:18:58.86+00:00
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528320511543738368
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

**Content**

```text
Yes, although depending on the content a yosys ROM can be smaller, that's only true if the content can simplify well. If not, it quickly grows and the routing mess it creates also can make P&R a real pain.

I have been drafing how to adapt it to gf180. Some of the tricks and structure I used in sky130 don't really apply here ( actually then end up being counter productive ) but I have a few things up my sleeve that I hope will pan out.

Priority ATM is however to validate the sky130 one. Although it's been silicon proven as far as it outputs the right data, the whole timing validation remains to be done and that's not a small thing 😅
```

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## message-1528736051407880202

**2026-07-20T12:11:17.198+00:00 — Rob Taylor (@robtaylor_52029)**

- Message ID: `1528736051407880202`
- Author ID: `1498420485531111548`
- Nickname: Rob Taylor
- User name: robtaylor_52029
- Type: `Default`
- Edited: 2026-07-20T12:24:01.525+00:00
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528736051407880202
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

**Content**

```text
Thank you both.

I guess a possible sythesis based solution could be to have a librelane step that builds a macro for the rom (cached om rom content), which would give the benefits @Leo Moser (mole99) mentioned without needing to port to every process.
```

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## message-1528744064969609308

**2026-07-20T12:43:07.78+00:00 — tnt (@246tnt)**

- Message ID: `1528744064969609308`
- Author ID: `596068704471482370`
- Nickname: tnt
- User name: 246tnt
- Type: `Default`
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528744064969609308
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

**Content**

```text
I don't see how that would work. If you use a normal synthesis process to build a ROM, the size of that macro is heavily dependent  on the ROM content. If you change the rom content, the size would change.
```

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## message-1528745950993059890

**2026-07-20T12:50:37.443+00:00 — namibj**

- Message ID: `1528745950993059890`
- Author ID: `262706220073222144`
- Nickname: namibj
- User name: namibj
- Type: `Default`
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528745950993059890
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

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```text
I think the idea is to avoid paying the ROM's PnR cost each time?
```

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## message-1528758708761399336

**2026-07-20T13:41:19.132+00:00 — Rob Taylor (@robtaylor_52029)**

- Message ID: `1528758708761399336`
- Author ID: `1498420485531111548`
- Nickname: Rob Taylor
- User name: robtaylor_52029
- Type: `Reply`
- Edited: 2026-07-20T13:44:15.271+00:00
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528758708761399336
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

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**Content**

```text
true.. isn't that also the case for a ram generator? I guess you could configure a macro block size, pins etc
```

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---

## message-1528758813359083641

**2026-07-20T13:41:44.07+00:00 — Rob Taylor (@robtaylor_52029)**

- Message ID: `1528758813359083641`
- Author ID: `1498420485531111548`
- Nickname: Rob Taylor
- User name: robtaylor_52029
- Type: `Reply`
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528758813359083641
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

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```text
could cache based on pdk and hash of rom contents
```

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## message-1528759895434854531

**2026-07-20T13:46:02.057+00:00 — Rob Taylor (@robtaylor_52029)**

- Message ID: `1528759895434854531`
- Author ID: `1498420485531111548`
- Nickname: Rob Taylor
- User name: robtaylor_52029
- Type: `Reply`
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528759895434854531
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

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I wonder if there's a way to calculate what the max area could be for a given rom size. I'm finding it hard to think about that though 😅
```

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## message-1528787193852727588

**2026-07-20T15:34:30.507+00:00 — namibj**

- Message ID: `1528787193852727588`
- Author ID: `262706220073222144`
- Nickname: namibj
- User name: namibj
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The benefit of synthesis (via abc) ROM would be to be smaller than a mask ROM.
```

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## message-1528787305341518056

**2026-07-20T15:34:57.088+00:00 — namibj**

- Message ID: `1528787305341518056`
- Author ID: `262706220073222144`
- Nickname: namibj
- User name: namibj
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- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1528787305341518056
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Design a mask ROM.
```

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## message-1529162555023691786

**2026-07-21T16:26:03.584+00:00 — Rob Taylor (@robtaylor_52029)**

- Message ID: `1529162555023691786`
- Author ID: `1498420485531111548`
- Nickname: Rob Taylor
- User name: robtaylor_52029
- Type: `Reply`
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1529162555023691786
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cool. let me know if you do anything in this space 🙂
```

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## message-1529162679690723418

**2026-07-21T16:26:33.307+00:00 — namibj**

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- Author ID: `262706220073222144`
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I'm not expecting to 🙁
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## message-1529164396448841748

**2026-07-21T16:33:22.614+00:00 — namibj**

- Message ID: `1529164396448841748`
- Author ID: `262706220073222144`
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- Edited: 2026-07-21T16:34:02.26+00:00
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1529164396448841748
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

**Reply/reference**
- https://discord.com/channels/1361349522684510449/1528307350790733886/1529162555023691786
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```text
(Though I am looking towards perhaps a RAM setup that would allow mapping a short history of nominal transmit symbols to a DAC code; and that in a way that can efficciently be run with a good amount of interleaving/C-slowed action applied, like 4 or 8 or so times slower RAM-bitline-action than the symbol rate of the stream.)
(Such approach is highly capable of mitigating data-dependent output waveform distortion, even in ways that are non-trivial interactions with a particular instance's bond wire inductance and PVT variations, notably having rather little penalty for multi-level signalling (e.g. PAM3/4/5) compared to classic binary "virtual" shift register approaches to the task of mitigating data-dependent waveform distortion.)
```

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---

## message-1529836775453757460

**2026-07-23T13:05:10.261+00:00 — Rob Taylor (@robtaylor_52029)**

- Message ID: `1529836775453757460`
- Author ID: `1498420485531111548`
- Nickname: Rob Taylor
- User name: robtaylor_52029
- Type: `Reply`
- Discord message: https://discord.com/channels/1361349522684510449/1528307350790733886/1529836775453757460
- Archive source: https://discord.wafer.space/wafer-space/%E2%84%B9%EF%B8%8F%20-%20Information/general/sylvain-is-working-on-a-rom-compiler/2026-07/2026-07.json

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```text
ah well 🙂
```

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---